Heat treatment method for semiconductor substrates

ABSTRACT

The invention concerns a method for treating, a substrate comprising a semi-conducting layer ( 4 ) on at least one of its surfaces. Said method comprises a step for annealing the substrate and a step for forming, an oxide layer ( 6 ) at the semi-conducting layer ( 4 ) surface, carried out before the end of the annealing step, protecting the remainder of the semi-conducting layer ( 4 ).

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to the fabrication of semiconductorcomponents for the microelectronics industry and/or the optoelectronicsindustry. More specifically, it relates to the field of the fabricationand/or preparation of substrates intended for the production of suchcomponents.

2. Background of the Invention

There are certain substrate fabricating processes which consist intransferring a layer, for example a silicon layer, onto a supportsubstrate.

A process for fabricating layers and thin films of semiconductormaterial, comprising at least three steps, is known, for example fromdocument FR 2,681,472. During a first step, a layer of gaseousmicrobubbles is created by ion implantation under one face of a wafer ofsemiconductor material. During a second step, this face of the wafer istransferred onto a support substrate and fastened to the latter. Duringa third step, the assembly consisting of the wafer and the supportsubstrate is subjected to a heat treatment capable of cleaving the waferin the implantation layer. The choice of parameters, such as the timeand the temperature of this heat treatment, depends on the history andthe thermal budget of the semiconductor wafer. This thermal budget is,for example, acquired during the implantation step, by intentionalheating and/or by heating due to the ion beam itself. It may also beacquired during an annealing step which precedes the bonding and whichis intended to make the implanted atoms migrate for the purpose offacilitating the subsequent cleavage. It may furthermore be acquiredduring an annealing operation which is carried out before cleavage andis intended to stabilize the bonding. Other heat treatments may -also beenvisaged before cleavage.

After cleavage, a thin layer adhering to the support substrate isobtained. This process is called the Smart-Cut® process.

In one particular application of this process, called the SOI (SiliconOn Insulator) technique, a silicon-on-insulator layer is produced.Several ways may be envisaged for producing a silicon-on-insulator layerusing the process described in the previous paragraph. According to afirst way, it is possible, for example, to cover the silicon wafer, onits implantation face, with a layer of insulating oxide and to use asupport substrate, for example also made of silicon, for the transfer.According to a second way, it is possible to have a completelysemiconducting wafer which is transferred either onto a supportsubstrate covered with a layer of insulator or onto a completelyinsulating support substrate (e.g. quartz) According to a third way, itis possible to have an insulator on the semiconductor wafer and totransfer this wafer either onto a support substrate which is itself alsocovered with an insulator or onto a completely insulating substrate. Itshould furthermore be pointed out here that, in order to obtain aninsulator, it is advantageous to carry out a step of forming an oxidelayer on the surface of a wafer or of a support substrate, in this casemade of silicon, but more generally made of a semiconductor material.

After the three steps of the process described above, problems of thesemiconductor layer disbanding from its support substrate may arise.Defects present at the interface between the semiconductor layer and thesupport substrate may also become electrically active and make the wafercomposed of the support substrate/semiconductor layer assembly unusable.In order to alleviate these drawbacks, and more particularly to preventthe layer from disbanding when a polishing operation is envisaged, it isnecessary to reinforce the bonding interface between the supportsubstrate and the wafer having the semiconductor layer.

It is known that annealing at relatively high temperatures, i.e. greaterthan 1000° C. and preferably about 1100° C., allows the bondinginterface to be reinforced. Hereafter, any thermal operation intended toimprove the properties of the material we will call annealing. Thisannealing may be a heat treatment carried out at a constant temperatureor at a varying temperature. In the latter case, the annealing may becarried out, for example, with a gradual increase in temperature betweentwo values, with a cyclic oscillation between two temperatures, etc.

This type of annealing may be carried out in a non-oxidizing atmosphereor in an oxidizing atmosphere. Annealing in a non-oxidizing atmosphere(nitrogen, argon, vacuum, etc.) generally has the drawback of causingthe spurious phenomenon of pitting on the surface of a semiconductor,particularly silicon. Annealing in an oxidizing atmosphere has thedrawback of creating defects in the crystal structure. These defectsare, for example, of the stacking-fault type and/or, in SOI structures,HF defects (a defect is called an HF defect when its presence isrevealed by a halo of decoration of the buried oxide after treatment ina hydrofluoric acid bath), etc.

Moreover, it is sometimes useful, in the case of the application that wementioned earlier for example, to form an oxide layer on the surface ofa silicon layer, for example by oxidation. However, as indicated above,oxidation, but also more generally any formation of a surface oxidelayer, is known to generate defects. Now, the presence of these defectsin the crystal structure is thoroughly undesirable.

One object of the invention is to provide a process allowing annealingoperations to be carried out, especially for stabilizing the bondinginterface between a wafer comprising a semiconductor layer, especially asilicon wafer, and a support substrate, without any pitting of thesurface of the layer.

Another object of the invention is to provide a process allowing anoxide layer to be formed on the surface of the semiconductor layer,while limiting as far as possible the number of defects introduced intothe crystal structure.

SUMMARY OF THE INVENTION

These objects are achieved by virtue of a process for treating asubstrate which includes a semiconductor layer on at least one of itsfaces, characterized in that it comprises a step of annealing thesubstrate and a step of forming an oxide layer on the surface of thesemiconductor layer, which step is carried out before the end of theannealing step, protecting the rest of the semiconductor layer.

The expression “substrate which includes a semiconductor layer on atleast one of its faces” should be understood to mean an entirelysemiconducting substrate (for example a silicon substrate), or a stackof semiconducting layers, or else a substrate comprising inhomogeneousstructures or a substrate comprising components or parts of componentsat various stages in their fabrication.

By way of example, the semiconductor layers have a thickness of a fewtens of Å to a few tens of microns.

Thus, by virtue of the process according to the invention, an oxidelayer is formed on the surface of the semiconductor layer. This oxidelayer protects the rest of the semiconductor layer, during the annealingstep, in order especially to avoid the pitting phenomenon. The oxidelayer may be formed by deposition of an oxide on the surface of thesemiconductor layer (particularly, but not exclusively, in the case ofnonoxidizable semiconductors), by thermal oxidation of the surfaceregion of the semiconductor layer or else by deposition of an oxide onthe surface of the semiconductor layer followed by thermal oxidation ofthe semiconductor through the oxide layer already deposited. In allcases, the oxide may be composed of elements in the semiconductormaterial and of other elements, such as nitrogen, etc.

The combination of the step of forming a surface oxide layer and of theannealing step, in the process according to the invention, makes itpossible in particular to reinforce the bonding interface between thesemiconductor layer and the support substrate, preventing the formationof defects, and more particularly the formation of pitting-type defects.

Moreover, the step of annealing the substrate makes it possible to healthe semiconductor layer of the defects generated during the previoussteps in the fabrication and preparation process. More particularly, theannealing step may be carried out for a time and at a temperature whichare such that the crystal defects, such as stacking faults, HF defects,etc., generated in the semiconductor layer during the step of forming asurface oxide layer are healed. Thus, it is possible to form an oxidelayer on the surface of a semiconductor layer without dramaticallyincreasing its level of defects. The Applicant has furthermorediscovered that the healing of the semiconductor material by annealinggives it better resistance to any steps subsequent to the formation ofan oxide layer on the surface of the semiconductor layer. This isbecause a semiconductor layer contains fewer defects after formation ofa surface oxide layer, when it has been annealed prior to the formationof the oxide.

According to a variant of the process according to the invention, theprocess comprises, after the annealing step, a deoxidation step in orderto remove the oxide layer formed on the surface of the semiconductorlayer.

According to another variant, the process according to the inventioncomprises several steps of forming a surface oxide layer and severaldeoxidation steps, at least the final step of forming a surface oxidelayer being followed by an annealing step.

According to the latter two variants, the process implemented accordingto the invention makes it possible in particular to thin thesemiconductor layer, to remove part of the semiconductor layercontaining a high concentration of defects or else to reduce theroughness of the surface of the layer. Thus, the process according tothe invention proves to be particularly useful when, after theimplantation, bonding and cleaving steps of the abovementioned process,it is desired, on the one hand, to remove the part disturbed by theimplantation, i.e. in the cleavage zone (this part in fact contains anenormous number of defects) and, on the other hand, to reduce theroughness of the surface resulting from the cleavage. This formation ofa sacrificial surface oxide layer on part of the semiconductor layermakes it possible to avoid the drawbacks of a polishing operation byitself. This is because the technique of polishing generates defects ofthe mechanical lesion type, strain-hardened zones, etc. Whenchemical-mechanical polishing is used, defects due to the chemistry maybe added to the previous ones. In addition, the polishing generallyresults in lack of thickness uniformity. This latter drawback becomesmore and more critical as the thickness of material to be removedincreases, and therefore as the length of the polishing step increases.This is the case especially when the thickness to be removed bypolishing reaches 100 nm. Thus, all these drawbacks usually result in alack of reproducibility in the polishing results. In addition, lengthypolishing slow down the execution of the process and result in a drop inproductivity. The advantages of forming a sacrificial surface oxidelayer in accordance with the process according to the invention willtherefore be appreciated, since it makes it possible to remove materialand to thin a semiconductor layer. If this thinning is completed byformation of a sacrificial surface oxide layer in a polishing step, thedefects generated by the polishing operation may then be developed on asmaller scale.

According to another variant, the support substrate covered with thesemiconductor layer may be stored or delivered, for example to asemiconductor component fabricator, with a protective oxide layer whichwill be removed when the treatment of the substrate is continued.

BRIEF DESCRIPTION OF THE DRAWINGS

Other aspects, objects and advantages of the invention will appear onreading the detailed description which follows. The invention will alsobe more clearly understood with the aid of the references to thedrawings in which:

FIG. 1 shows diagrammatically the steps of an example of how the processfor treating semiconductor layers is implemented according to theinvention;

FIG. 2 shows a diagram of an example of how the temperature to which asubstrate is heated varies during its treatment by a process accordingto the present invention;

FIG. 3 shows a diagram of another example of how the temperature towhich a substrate is heated varies during its treatment by a processaccording to the present invention;

FIG. 4 shows diagrammatically the steps of a process of the prior artfor treating substrates for the microelectronics and optoelectronicsindustries; and

FIG. 5 shows diagrammatically the steps of smoothing a cleavage surfaceusing the process according to the invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

According to a non-limiting example of how the process according to theinvention is implemented, illustrated in FIG. 1, this is carried out ona wafer 1 which comprises a support substrate 2 covered by a siliconlayer 4, together with a buried-oxide interlayer 5 (FIG. 1a).

This process comprises a step of forming a surface oxide layer in orderto form a silicon oxide layer 6 (FIG. 1b), an annealing step and adeoxidation step (FIG. 1c).

During the step of forming the surface oxide layer, the silicon oxidelayer 6 develops in the vicinity of the initial surface 8 of the siliconlayer 4.

The formation of a surface oxide layer may be carried out using a dryprocess or a wet process. Using a dry process, the surface oxide layeris formed, for example, by heating the wafer 1 in gaseous oxygen. Usinga wet process, the surface oxide layer is formed, for example, by meansof water vapour.

Preferably, the step of forming the surface oxide layer and theannealing step of the process according to the invention are decoupledtemporally. Also preferably, the temperature at which the surface oxidelayer is formed is between 900 and 1000° C., since the formation of asurface oxide layer generates fewer defects in the SOI structure thelower its temperature. On the other hand, the annealing step isadvantageously carried out above 1000° C.

It is preferred to form the surface oxide layer using a wet process,since it introduces fewer defects of the type of those alreadymentioned. The wet process also gives higher rates of formation of thesurface oxide layer than the dry process and makes it possible tomaintain reasonable kinetics of formation of the surface oxide layer,while still working at lower temperature. Preferably therefore, the wetprocess is used at a temperature of approximately 950° C., withannealing at 1100° C. in a non-oxidizing atmosphere, for example innitrogen, in argon, etc.

As shown in FIG. 2, a surface oxide layer may be formed during a firsttemperature hold at 950° C., with annealing at a second temperature holdat T_(a)=1100° C.

In some cases, the wafer 1 may be raised to a temperature ofapproximately 1200° C. It may even be envisaged, for example in order tostabilize the bonding interface 10 between the buried-oxide layer 5 andthe support substrate 2, to carry out this annealing at even highertemperatures, but undesirable effects may arise, such as metalliccontaminations coming from the annealing equipment for example.

As illustrated in the diagram in FIG. 3, according to one variant, thesurface oxide layer may also be formed, for example, during the phase ofraising the temperature of the substrate to the annealing temperatureT_(a), at which a temperature hold is carried out.

In the implementation examples illustrated by FIGS. 2 and 3 anddescribed above, the step of forming the surface oxide layer is carriedout before the actual annealing step starts. However, according toanother way of implementing the process according to the invention, theformation of the surface oxide layer may be carried out both during thephase of raising the temperature of the substrate and during thebeginning of the annealing phase. It may also be entirely carried outduring the beginning of the annealing phase, for example by introducinga metered quantity of an oxidizing gas into the annealing atmosphere.Preferably, it is carried out in such a way that the formation of thesurface oxide layer is completed before the end of the annealing.

The deoxidation step is preferably carried out by immersing the wafer 1in a bath of hydrofluoric acid, which exhibits good silicon/siliconoxide etching selectivity.

Two examples of application of the invention will be explained below, inthe context of the Smart-Cut® process. This process is used here tofabricate SOI structures.

EXAMPLE 1

The process according to the invention, as described above, may becarried out for a time and at a temperature which are such as toreinforce the bonding interface 10, between the buriedoxide layer 5 andthe support substrate 2, obtained after the process illustrated in FIG.4 has been implemented.

According to this process, a silicon wafer 3 covered with a buried-oxidelayer is subjected to hydrogen ion implantation, for example using adose of 5×10¹⁶ H⁺/cm², at 100 KeV, in an implantation zone 12 located ata defined depth (FIG. 4a). After implantation, the silicon wafer 3 isbrought into contact with a support substrate 2 (FIG. 4b). The assembly,comprising the silicon wafer 3 and the support substrate 2, is thensubjected to a treatment step capable of allowing separation from thesilicon wafer 3, in the implantation zone 12 (FIG. 4c). This step is,for example, carried out by raising the assembly comprising the siliconwafer 3 and the support substrate 2 to a temperature which depends onthe implantation conditions and which may be as high as approximately600° C. According to a variant, mechanical stresses are applied incombination with the heat treatment or as a replacement of this heattreatment. After the semiconductor layer 4 has been separated from thewafer 3, a support substrate 2 covered by a thin silicon layer 4,together with a buried-oxide interlayer 5, is obtained. The free surfaceof this silicon layer 4 is a cleavage surface 14.

It is sometimes necessary, for example before polishing the cleavagesurface 14 or in order to prevent the formation of electrically activedefects, to carry out a step of stabilizing the bonding interface 10.This stabilization is obtained by annealing the substrate at atemperature close to 1100° C., for example. The annealing is carried outin an atmosphere containing at least one non-oxidizing gas, such asargon. A prior oxidation step is therefore preferably carried out in theregion of 950° C. in order to form an oxide layer 6 intended to protectthe silicon layer 4 during this stabilization annealing. After thisannealing, the silicon layer 4 undergoes a deoxidation step, intended toremove the protective oxide layer 6.

EXAMPLE 2

In the process illustrated by FIG. 4 and already described in thepresentation of the first example, after cleavage the cleavage surface14 of the silicon layer 4 is too rough and there remains, subjacent tothis cleavage surface 14, a disturbed zone 16 corresponding to theremaining part of the implantation zone 12 (FIG. 5a and 5 b). Theprocess according to the invention may therefore be carried out in orderto remove this disturbed zone 16 and to re-establish a suitableroughness. According to the technique of the prior art, these operationsare carried out by chemical-mechanical polishing. However, polishing isnot completely satisfactory since it has the drawbacks already mentionedabove. The process according to the invention remedies them by forming asacrificial surface oxide layer.

The silicon layer 4 is oxidized, by heat treatment using one of thetechniques explained above, in order to form an oxide layer 6 (FIG. 5c).This oxide layer 6 develops in the vicinity of the cleavage surface 14and the interface between the oxide and the silicon advances into thedepth of the silicon, progressively smoothing the roughness of thecleavage surface 14.

An annealing step in accordance with the process according to theinvention is then carried out.

The oxide layer 6 is then consumed chemically (FIG. 5d). By way ofexample in this case, in order to remove from one thousand Angströms toa few thousands of ångströms, the wafer 1 is immersed in a 10 or 20%hydrofluoric acid bath for a few minutes.

In order to carry out this variant of the process according to theinvention, the important parameters are the temperature, the oxidationtime, the oxidizing character of the atmosphere and the oxygen content.These parameters may be well controlled. This makes this application ofthe process according to the invention to the formation of a sacrificiallayer very reproducible. This process is also flexible to use and isconsistent with all the usual substrate treatment procedures for thefabrication of components for the microelectronics industry.

The process according to the invention may also include at least onestep of forming a surface oxide layer and at least one deoxidation step,at least one annealing step being carried out after the final step offorming a surface oxide layer so as to heal the defects generated by thestep or steps of forming an oxide layer on previous surfaces. Accordingto another variant, the process according to the invention comprisesseveral steps of forming a surface oxide layer and several deoxidationsteps, each step of forming a surface oxide layer being followed by anannealing step.

The abovementioned steps of forming a sacrificial layer may be combinedwith a polishing step. This polishing step may or may not be after thesteps of forming a sacrificial layer. The combination of these steps maybe used to remove part of the silicon layer having a high concentrationof crystal defects, these being, for example, in the zone disturbed bythe ion implantation. This combination may also be used to reduce theroughness. By virtue of the formation of a sacrificial surface oxidelayer and of the deoxidation with which it is associated, the polishingoperation may then be very substantially shorter and therefore lessliable to damage the silicon layer 4. Carried out after the formationand removal of a sacrificial surface oxide layer, it is more effectivesince the roughness, difficult to decrease by chemical-mechanicalpolishing, has already been reduced to a large extent.

According to an advantageous variant, a step of forming a surface oxidelayer is followed by an annealing step which annealing heals the defectsgenerated by the formation of the surface oxide layer and stabilizes thebonding interface 10, a deoxidation step is carried out after thisannealing and, finally, a short polishing step allows the reduction inroughness to be completed.

In general, the process according to the invention is implemented in thecontext of processes designed to transfer layers of materials onto asupport substrate 2 (Smart-Cut®, etc.). It therefore serves to reinforcethe interface where the materials are bonded to the support substrate 2and/or to remove a layer in the vicinity of a highly disturbed zone 16.The process according to the invention is also implemented in thecontext of processes designed to produce SOI structures (SIMOX,Smart-Cut®, etc.) or in the context of the use of these structures. Itthen serves to thin or oxidize a silicon layer 4 without dramaticallyincreasing the level of defects in this silicon layer 4.

Again, the process according to the invention is advantageously used toform an oxide layer 6 locally on at least part of the surface of thesemiconductor layer 4.

What has been described above in the case of silicon may be transposedto other semiconductors, especially silicon compounds such as SiC, SiGe,etc.

The process according to the invention makes it possible to obtainSOI-type semiconductor structures in which the HF defect density is lessthan 1 defect/cm² in a semiconductor layer 4 whose thickness is lessthan 2000 Angströms.

The process according to the invention also makes it possible to obtainsemiconductor structures in which a semiconductor layer 4, having auniformity of thickness of better than 5%, has an rms roughness value ofless than 2 nm.

Obviously, many modifications and variations of the present inventionare possible in light of the above teachings. Thus, it is to beunderstood that, within the scope of the appended claims, the inventionmay be practiced otherwise than as specifically described above.

What is claimed and desired to be secured by Letters Patent of theUnited States is:
 1. A process for treating a substrate which includes asemiconductor layer on at least one of its faces, comprising the stepsof: forming an oxide layer on a surface of the semiconductor layer; andannealing the substrate under an atmosphere which leaves said oxidelayer unaffected such that said oxide layer remains and limits formationof defects during said step of annealing.
 2. The process according toclaim 1, wherein the step of forming the oxide layer is carried out bythermal oxidation of the semiconductor layer.
 3. The process accordingto claim 1, wherein the substrate is annealed in an atmospherecomprising at least one non-oxidizing gas.
 4. The process according toclaim 1, wherein the annealing step is carried out for a time and at atemperature which are such that crystal defects generated in thesemiconductor layer by the formation of the surface oxide layer arehealed.
 5. The process according to claim 1, further comprising, afterthe annealing step, a deoxidation step in order to remove the oxidelayer formed on the surface of the semiconductor layer.
 6. The processaccording to claim 5, wherein said deoxidation step thins thesemiconductor layer.
 7. The process according to claim 1, wherein thesubstrate further includes a support substrate and the annealing step iscarried out for a time and at a temperature which are such that abonding interface between the semiconductor layer and the supportsubstrate is reinforced.
 8. The process according to claim 1, comprisingseveral steps of forming a surface oxide layer and several deoxidationsteps, at least a final step of forming a surface oxide layer beingfollowed by an annealing step.
 9. The process according to claim 1,further comprising a subsequent polishing step.
 10. The processaccording to claim 1, further comprising a step of implanting atomsunder at least one face of a wafer of a semiconductor material in animplantation zone, a step of bringing said face of the wafer subjectedto the implantation into intimate contact with a support substrate, anda treatment step capable of allowing separation from the wafer, in theimplantation zone, in order to separate a semiconductor layer from thewafer and constitute the substrate comprising this semiconductor layer.11. The process according to claim 1, wherein the semiconductor issilicon.
 12. The process according to claim 11, wherein said annealingstep is carried out above 1000° C.
 13. The process according to claim11, wherein said step of forming an oxide layer is carried out at alower temperature than said annealing step.
 14. The process according toclaim 8, wherein each step of forming a surface oxide layer is carriedout before each annealing step starts.
 15. The process according toclaim 1, wherein at least one step of forming a surface oxide layer iscarried out, at least partially, during a phase of raising a temperatureof the substrate to an annealing temperature.
 16. The process accordingto claim 1, wherein said step of forming a surface oxide layer iscarried out, at a same temperature as that of the annealing step, byintroducing a metered quantity of an oxidizing gas into the annealingatmosphere.
 17. The process according to claim 1, wherein the oxidelayer is formed locally on at least part of the surface of thesemiconductor layer.
 18. A SOI semiconductor structure produced byforming an oxide layer on a surface of a semiconductor layer andannealing the structure under an atmosphere which leaves said oxidelayer unaffected such that said oxide layer remains and limits formationof defects during the annealing, said structure having an HF defectdensity less than 1 defect/cm² in the semiconductor layer which has athickness of less than 2000 Angströms.
 19. A semiconductor structureproduced by forming an oxide layer on a surface of a semiconductor layerand annealing the structure under an atmosphere which leaves-said oxidelayer unaffected such that said oxide layer remains and limits formationof defects during the annealing, the semiconductor layer having auniformity of thickness of better than 5% and an rms roughness value ofless than 2 nm.
 20. The process according to claim 12, wherein saidannealing step is carried out at a temperature of about 1100° C.
 21. Theprocess according to claim 13, wherein said step of forming the oxidelayer is carried out at a temperature of between 900° C. and 1000° C.